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pub struct Instruction { /* private fields */ }
Expand description

A 16/32/64-bit x86 instruction. Created by Decoder, by CodeAssembler or by Instruction::with*() methods.

Implementations

Creates an empty Instruction (all fields are cleared). See also the with_*() constructor methods.

Checks if two instructions are equal, comparing all bits, not ignoring anything. == ignores some fields.

Gets the 16-bit IP of the instruction, see also next_ip16()

Sets the 16-bit IP of the instruction, see also set_next_ip16()

Arguments
  • new_value: new value

Gets the 32-bit IP of the instruction, see also next_ip32()

Sets the 32-bit IP of the instruction, see also set_next_ip32()

Arguments
  • new_value: new value

Gets the 64-bit IP of the instruction, see also next_ip()

Sets the 64-bit IP of the instruction, see also set_next_ip()

Arguments
  • new_value: new value

Gets the 16-bit IP of the next instruction, see also ip16()

Sets the 16-bit IP of the next instruction, see also set_ip16()

Arguments
  • new_value: new value

Gets the 32-bit IP of the next instruction, see also ip32()

Sets the 32-bit IP of the next instruction, see also set_ip32()

Arguments
  • new_value: new value

Gets the 64-bit IP of the next instruction, see also ip()

Sets the 64-bit IP of the next instruction, see also set_ip()

Arguments
  • new_value: new value

Gets the code size when the instruction was decoded. This value is informational and can be used by a formatter.

Sets the code size when the instruction was decoded. This value is informational and can be used by a formatter.

Arguments
  • new_value: new value

Checks if it’s an invalid instruction (code() == Code::INVALID)

Gets the instruction code, see also mnemonic()

Sets the instruction code

Arguments
  • new_value: new value

Gets the mnemonic, see also code()

Gets the operand count. An instruction can have 0-5 operands.

Examples
use iced_x86::*;

// add [rax],ebx
let bytes = b"\x01\x18";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);
let instr = decoder.decode();

assert_eq!(instr.op_count(), 2);

Gets the length of the instruction, 0-15 bytes. This is just informational. If you modify the instruction or create a new one, this method could return the wrong value.

Sets the length of the instruction, 0-15 bytes. This is just informational. If you modify the instruction or create a new one, this method could return the wrong value.

Arguments
  • new_value: new value

true if the instruction has the XACQUIRE prefix (F2)

true if the instruction has the XACQUIRE prefix (F2)

Arguments
  • new_value: new value

true if the instruction has the XRELEASE prefix (F3)

true if the instruction has the XRELEASE prefix (F3)

Arguments
  • new_value: new value

true if the instruction has the REPE or REP prefix (F3)

true if the instruction has the REPE or REP prefix (F3)

Arguments
  • new_value: new value

true if the instruction has the REPE or REP prefix (F3)

true if the instruction has the REPE or REP prefix (F3)

Arguments
  • new_value: new value

true if the instruction has the REPNE prefix (F2)

true if the instruction has the REPNE prefix (F2)

Arguments
  • new_value: new value

true if the instruction has the LOCK prefix (F0)

true if the instruction has the LOCK prefix (F0)

Arguments
  • new_value: new value

Gets operand #0’s kind if the operand exists (see op_count() and try_op_kind())

Sets operand #0’s kind if the operand exists (see op_count() and try_set_op_kind())

Arguments
  • new_value: new value

Gets operand #1’s kind if the operand exists (see op_count() and try_op_kind())

Sets operand #1’s kind if the operand exists (see op_count() and try_set_op_kind())

Arguments
  • new_value: new value

Gets operand #2’s kind if the operand exists (see op_count() and try_op_kind())

Sets operand #2’s kind if the operand exists (see op_count() and try_set_op_kind())

Arguments
  • new_value: new value

Gets operand #3’s kind if the operand exists (see op_count() and try_op_kind())

Sets operand #3’s kind if the operand exists (see op_count() and try_set_op_kind())

Arguments
  • new_value: new value

Gets operand #4’s kind if the operand exists (see op_count() and try_op_kind())

Sets operand #4’s kind if the operand exists (see op_count() and try_set_op_kind())

Arguments
  • new_value: new value

Gets all op kinds (op_count() values)

Examples
use iced_x86::*;

// add [rax],ebx
let bytes = b"\x01\x18";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);
let instr = decoder.decode();

for (i, op_kind) in instr.op_kinds().enumerate() {
    println!("op kind #{} = {:?}", i, op_kind);
}

Gets an operand’s kind if it exists (see op_count())

Arguments
  • operand: Operand number, 0-4
Examples
use iced_x86::*;

// add [rax],ebx
let bytes = b"\x01\x18";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);
let instr = decoder.decode();

assert_eq!(instr.op_count(), 2);
assert_eq!(instr.op_kind(0), OpKind::Memory);
assert_eq!(instr.memory_base(), Register::RAX);
assert_eq!(instr.memory_index(), Register::None);
assert_eq!(instr.op_kind(1), OpKind::Register);
assert_eq!(instr.op_register(1), Register::EBX);

Sets an operand’s kind

Arguments
  • operand: Operand number, 0-4
  • op_kind: Operand kind

Checks if the instruction has a segment override prefix, see segment_prefix()

Gets the segment override prefix or Register::None if none. See also memory_segment(). Use this method if the operand has kind OpKind::Memory, OpKind::MemorySegSI, OpKind::MemorySegESI, OpKind::MemorySegRSI

Sets the segment override prefix or Register::None if none. See also memory_segment(). Use this method if the operand has kind OpKind::Memory, OpKind::MemorySegSI, OpKind::MemorySegESI, OpKind::MemorySegRSI

Arguments
  • new_value: Segment register prefix

Gets the effective segment register used to reference the memory location. Use this method if the operand has kind OpKind::Memory, OpKind::MemorySegSI, OpKind::MemorySegESI, OpKind::MemorySegRSI

Gets the size of the memory displacement in bytes. Valid values are 0, 1 (16/32/64-bit), 2 (16-bit), 4 (32-bit), 8 (64-bit). Note that the return value can be 1 and memory_displacement64() may still not fit in a signed byte if it’s an EVEX/MVEX encoded instruction. Use this method if the operand has kind OpKind::Memory

Sets the size of the memory displacement in bytes. Valid values are 0, 1 (16/32/64-bit), 2 (16-bit), 4 (32-bit), 8 (64-bit). Note that the return value can be 1 and memory_displacement64() may still not fit in a signed byte if it’s an EVEX/MVEX encoded instruction. Use this method if the operand has kind OpKind::Memory

Arguments
  • new_value: Displacement size

true if the data is broadcast (EVEX instructions only)

Sets the is broadcast flag (EVEX instructions only)

Arguments
  • new_value: New value

true if eviction hint bit is set ({eh}) (MVEX instructions only)

true if eviction hint bit is set ({eh}) (MVEX instructions only)

Arguments
  • new_value: New value

(MVEX) Register/memory operand conversion function

(MVEX) Register/memory operand conversion function

Arguments
  • new_value: New value

Gets the size of the memory location that is referenced by the operand. See also is_broadcast(). Use this method if the operand has kind OpKind::Memory, OpKind::MemorySegSI, OpKind::MemorySegESI, OpKind::MemorySegRSI, OpKind::MemoryESDI, OpKind::MemoryESEDI, OpKind::MemoryESRDI

Gets the index register scale value, valid values are *1, *2, *4, *8. Use this method if the operand has kind OpKind::Memory

Sets the index register scale value, valid values are *1, *2, *4, *8. Use this method if the operand has kind OpKind::Memory

Arguments
  • new_value: New value (1, 2, 4 or 8)

Gets the memory operand’s displacement or the 32-bit absolute address if it’s an EIP or RIP relative memory operand. Use this method if the operand has kind OpKind::Memory

Gets the memory operand’s displacement or the 32-bit absolute address if it’s an EIP or RIP relative memory operand. Use this method if the operand has kind OpKind::Memory

Arguments
  • new_value: New value

Gets the memory operand’s displacement or the 64-bit absolute address if it’s an EIP or RIP relative memory operand. Use this method if the operand has kind OpKind::Memory

Gets the memory operand’s displacement or the 64-bit absolute address if it’s an EIP or RIP relative memory operand. Use this method if the operand has kind OpKind::Memory

Arguments
  • new_value: New value

Gets an operand’s immediate value

Arguments
  • operand: Operand number, 0-4

Sets an operand’s immediate value

Arguments
  • operand: Operand number, 0-4
  • new_value: Immediate

Sets an operand’s immediate value

Arguments
  • operand: Operand number, 0-4
  • new_value: Immediate

Sets an operand’s immediate value

Arguments
  • operand: Operand number, 0-4
  • new_value: Immediate

Sets an operand’s immediate value

Arguments
  • operand: Operand number, 0-4
  • new_value: Immediate

Gets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate8

Sets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate8

Arguments
  • new_value: New value

Gets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate8_2nd

Sets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate8_2nd

Arguments
  • new_value: New value

Gets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate16

Sets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate16

Arguments
  • new_value: New value

Gets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate32

Sets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate32

Arguments
  • new_value: New value

Gets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate64

Sets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate64

Arguments
  • new_value: New value

Gets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate8to16

Sets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate8to16

Arguments
  • new_value: New value

Gets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate8to32

Sets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate8to32

Arguments
  • new_value: New value

Gets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate8to64

Sets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate8to64

Arguments
  • new_value: New value

Gets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate32to64

Sets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate32to64

Arguments
  • new_value: New value

Gets the operand’s branch target. Use this method if the operand has kind OpKind::NearBranch16

Sets the operand’s branch target. Use this method if the operand has kind OpKind::NearBranch16

Arguments
  • new_value: New value

Gets the operand’s branch target. Use this method if the operand has kind OpKind::NearBranch32

Sets the operand’s branch target. Use this method if the operand has kind OpKind::NearBranch32

Arguments
  • new_value: New value

Gets the operand’s branch target. Use this method if the operand has kind OpKind::NearBranch64

Sets the operand’s branch target. Use this method if the operand has kind OpKind::NearBranch64

Arguments
  • new_value: New value

Gets the near branch target if it’s a CALL/JMP/Jcc near branch instruction (i.e., if op0_kind() is OpKind::NearBranch16, OpKind::NearBranch32 or OpKind::NearBranch64)

Gets the operand’s branch target. Use this method if the operand has kind OpKind::FarBranch16

Sets the operand’s branch target. Use this method if the operand has kind OpKind::FarBranch16

Arguments
  • new_value: New value

Gets the operand’s branch target. Use this method if the operand has kind OpKind::FarBranch32

Sets the operand’s branch target. Use this method if the operand has kind OpKind::FarBranch32

Arguments
  • new_value: New value

Gets the operand’s branch target selector. Use this method if the operand has kind OpKind::FarBranch16 or OpKind::FarBranch32

Sets the operand’s branch target selector. Use this method if the operand has kind OpKind::FarBranch16 or OpKind::FarBranch32

Arguments
  • new_value: New value

Gets the memory operand’s base register or Register::None if none. Use this method if the operand has kind OpKind::Memory

Sets the memory operand’s base register or Register::None if none. Use this method if the operand has kind OpKind::Memory

Arguments
  • new_value: New value

Gets the memory operand’s index register or Register::None if none. Use this method if the operand has kind OpKind::Memory

Sets the memory operand’s index register or Register::None if none. Use this method if the operand has kind OpKind::Memory

Arguments
  • new_value: New value

Gets operand #0’s register value. Use this method if operand #0 (op0_kind()) has kind OpKind::Register, see op_count() and try_op_register()

Sets operand #0’s register value. Use this method if operand #0 (op0_kind()) has kind OpKind::Register, see op_count() and try_op_register()

Arguments
  • new_value: New value

Gets operand #1’s register value. Use this method if operand #1 (op0_kind()) has kind OpKind::Register, see op_count() and try_op_register()

Sets operand #1’s register value. Use this method if operand #1 (op0_kind()) has kind OpKind::Register, see op_count() and try_op_register()

Arguments
  • new_value: New value

Gets operand #2’s register value. Use this method if operand #2 (op0_kind()) has kind OpKind::Register, see op_count() and try_op_register()

Sets operand #2’s register value. Use this method if operand #2 (op0_kind()) has kind OpKind::Register, see op_count() and try_op_register()

Arguments
  • new_value: New value

Gets operand #3’s register value. Use this method if operand #3 (op0_kind()) has kind OpKind::Register, see op_count() and try_op_register()

Sets operand #3’s register value. Use this method if operand #3 (op0_kind()) has kind OpKind::Register, see op_count() and try_op_register()

Arguments
  • new_value: New value

Gets operand #4’s register value. Use this method if operand #4 (op0_kind()) has kind OpKind::Register, see op_count() and try_op_register()

Sets operand #4’s register value. Use this method if operand #4 (op0_kind()) has kind OpKind::Register, see op_count() and try_op_register()

Arguments
  • new_value: New value

Gets the operand’s register value. Use this method if the operand has kind OpKind::Register

Arguments
  • operand: Operand number, 0-4
Examples
use iced_x86::*;

// add [rax],ebx
let bytes = b"\x01\x18";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);
let instr = decoder.decode();

assert_eq!(instr.op_count(), 2);
assert_eq!(instr.op_kind(0), OpKind::Memory);
assert_eq!(instr.op_kind(1), OpKind::Register);
assert_eq!(instr.op_register(1), Register::EBX);

Sets the operand’s register value. Use this method if the operand has kind OpKind::Register

Arguments
  • operand: Operand number, 0-4
  • new_value: New value

Gets the opmask register (Register::K1 - Register::K7) or Register::None if none

Sets the opmask register (Register::K1 - Register::K7) or Register::None if none

Arguments
  • new_value: New value

Checks if there’s an opmask register (op_mask())

true if zeroing-masking, false if merging-masking. Only used by most EVEX encoded instructions that use opmask registers.

true if zeroing-masking, false if merging-masking. Only used by most EVEX encoded instructions that use opmask registers.

Arguments
  • new_value: New value

true if merging-masking, false if zeroing-masking. Only used by most EVEX encoded instructions that use opmask registers.

true if merging-masking, false if zeroing-masking. Only used by most EVEX encoded instructions that use opmask registers.

Arguments
  • new_value: New value

Gets the rounding control (SAE is implied but suppress_all_exceptions() still returns false) or RoundingControl::None if the instruction doesn’t use it.

Sets the rounding control (SAE is implied but suppress_all_exceptions() still returns false) or RoundingControl::None if the instruction doesn’t use it.

Arguments
  • new_value: New value

Gets the number of elements in a db/dw/dd/dq directive. Can only be called if code() is Code::DeclareByte, Code::DeclareWord, Code::DeclareDword, Code::DeclareQword

Sets the number of elements in a db/dw/dd/dq directive. Can only be called if code() is Code::DeclareByte, Code::DeclareWord, Code::DeclareDword, Code::DeclareQword

Arguments
  • new_value: New value: db: 1-16; dw: 1-8; dd: 1-4; dq: 1-2

Sets a new db value, see also declare_data_len(). Can only be called if code() is Code::DeclareByte

Arguments
  • index: Index (0-15)
  • new_value: New value

Sets a new db value, see also declare_data_len(). Can only be called if code() is Code::DeclareByte

Errors
  • Fails if index is invalid
Arguments
  • index: Index (0-15)
  • new_value: New value

Sets a new db value, see also declare_data_len(). Can only be called if code() is Code::DeclareByte

Arguments
  • index: Index (0-15)
  • new_value: New value

Gets a db value, see also declare_data_len(). Can only be called if code() is Code::DeclareByte

Arguments
  • index: Index (0-15)

Sets a new dw value, see also declare_data_len(). Can only be called if code() is Code::DeclareWord

Arguments
  • index: Index (0-7)
  • new_value: New value

Sets a new dw value, see also declare_data_len(). Can only be called if code() is Code::DeclareWord

Arguments
  • index: Index (0-7)
  • new_value: New value

Gets a dw value, see also declare_data_len(). Can only be called if code() is Code::DeclareWord

Arguments
  • index: Index (0-7)

Sets a new dd value, see also declare_data_len(). Can only be called if code() is Code::DeclareDword

Arguments
  • index: Index (0-3)
  • new_value: New value

Sets a new dd value, see also declare_data_len(). Can only be called if code() is Code::DeclareDword

Arguments
  • index: Index (0-3)
  • new_value: New value

Gets a dd value, see also declare_data_len(). Can only be called if code() is Code::DeclareDword

Arguments
  • index: Index (0-3)

Sets a new dq value, see also declare_data_len(). Can only be called if code() is Code::DeclareQword

Arguments
  • index: Index (0-1)
  • new_value: New value

Sets a new dq value, see also declare_data_len(). Can only be called if code() is Code::DeclareQword

Arguments
  • index: Index (0-1)
  • new_value: New value

Gets a dq value, see also declare_data_len(). Can only be called if code() is Code::DeclareQword

Arguments
  • index: Index (0-1)

Checks if this is a VSIB instruction, see also is_vsib32(), is_vsib64()

VSIB instructions only (is_vsib()): true if it’s using 32-bit indexes, false if it’s using 64-bit indexes

VSIB instructions only (is_vsib()): true if it’s using 64-bit indexes, false if it’s using 32-bit indexes

Checks if it’s a vsib instruction.

Returns
  • Some(true) if it’s a VSIB instruction with 64-bit indexes
  • Some(false) if it’s a VSIB instruction with 32-bit indexes
  • None if it’s not a VSIB instruction.

Gets the suppress all exceptions flag (EVEX/MVEX encoded instructions). Note that if rounding_control() is not RoundingControl::None, SAE is implied but this method will still return false.

Sets the suppress all exceptions flag (EVEX/MVEX encoded instructions). Note that if rounding_control() is not RoundingControl::None, SAE is implied but this method will still return false.

Arguments
  • new_value: New value

Checks if the memory operand is RIP/EIP relative

Gets the RIP/EIP releative address (memory_displacement32() or memory_displacement64()). This method is only valid if there’s a memory operand with RIP/EIP relative addressing, see is_ip_rel_memory_operand()

Gets the virtual address of a memory operand

Arguments
  • operand: Operand number, 0-4, must be a memory operand
  • element_index: Only used if it’s a vsib memory operand. This is the element index of the vector index register.
  • get_register_value: Function that returns the value of a register or the base address of a segment register, or None for unsupported registers.
Call-back function args
  • Arg 1: register: Register (GPR8, GPR16, GPR32, GPR64, XMM, YMM, ZMM, seg). If it’s a segment register, the call-back function should return the segment’s base address, not the segment’s register value.
  • Arg 2: element_index: Only used if it’s a vsib memory operand. This is the element index of the vector index register.
  • Arg 3: element_size: Only used if it’s a vsib memory operand. Size in bytes of elements in vector index register (4 or 8).
Examples
use iced_x86::*;

// add [rdi+r12*8-5AA5EDCCh],esi
let bytes = b"\x42\x01\xB4\xE7\x34\x12\x5A\xA5";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);
let instr = decoder.decode();

let va = instr.virtual_address(0, 0, |register, _element_index, _element_size| {
    match register {
        // The base address of ES, CS, SS and DS is always 0 in 64-bit mode
        Register::DS => Some(0x0000_0000_0000_0000),
        Register::RDI => Some(0x0000_0000_1000_0000),
        Register::R12 => Some(0x0000_0004_0000_0000),
        _ => None,
    }
});
assert_eq!(va, Some(0x0000_001F_B55A_1234));

Gets the number of bytes added to SP/ESP/RSP or 0 if it’s not an instruction that pushes or pops data. This method assumes the instruction doesn’t change the privilege level (eg. IRET/D/Q). If it’s the LEAVE instruction, this method returns 0.

Examples
use iced_x86::*;

// pushfq
let bytes = b"\x9C";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);
let instr = decoder.decode();

assert!(instr.is_stack_instruction());
assert_eq!(instr.stack_pointer_increment(), -8);

Gets the FPU status word’s TOP increment value and whether it’s a conditional or unconditional push/pop and whether TOP is written.

Examples
use iced_x86::*;

// ficomp dword ptr [rax]
let bytes = b"\xDA\x18";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);
let instr = decoder.decode();

let info = instr.fpu_stack_increment_info();
// It pops the stack once
assert_eq!(info.increment(), 1);
assert!(!info.conditional());
assert!(info.writes_top());

Instruction encoding, eg. Legacy, 3DNow!, VEX, EVEX, XOP

Examples
use iced_x86::*;

// vmovaps xmm1,xmm5
let bytes = b"\xC5\xF8\x28\xCD";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);
let instr = decoder.decode();

assert_eq!(instr.encoding(), EncodingKind::VEX);

Gets the CPU or CPUID feature flags

Examples
use iced_x86::*;

// vmovaps xmm1,xmm5
// vmovaps xmm10{k3}{z},xmm19
let bytes = b"\xC5\xF8\x28\xCD\x62\x31\x7C\x8B\x28\xD3";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

// vmovaps xmm1,xmm5
let instr = decoder.decode();
let cpuid = instr.cpuid_features();
assert_eq!(cpuid.len(), 1);
assert_eq!(cpuid[0], CpuidFeature::AVX);

// vmovaps xmm10{k3}{z},xmm19
let instr = decoder.decode();
let cpuid = instr.cpuid_features();
assert_eq!(cpuid.len(), 2);
assert_eq!(cpuid[0], CpuidFeature::AVX512VL);
assert_eq!(cpuid[1], CpuidFeature::AVX512F);

Control flow info

Examples
use iced_x86::*;

// or ecx,esi
// ud0 rcx,rsi
// call rcx
let bytes = b"\x0B\xCE\x48\x0F\xFF\xCE\xFF\xD1";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

// or ecx,esi
let instr = decoder.decode();
assert_eq!(instr.flow_control(), FlowControl::Next);

// ud0 rcx,rsi
let instr = decoder.decode();
assert_eq!(instr.flow_control(), FlowControl::Exception);

// call rcx
let instr = decoder.decode();
assert_eq!(instr.flow_control(), FlowControl::IndirectCall);

true if it’s a privileged instruction (all CPL=0 instructions (except VMCALL) and IOPL instructions IN, INS, OUT, OUTS, CLI, STI)

true if this is an instruction that implicitly uses the stack pointer (SP/ESP/RSP), eg. CALL, PUSH, POP, RET, etc. See also stack_pointer_increment()

Examples
use iced_x86::*;

// or ecx,esi
// push rax
let bytes = b"\x0B\xCE\x50";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

// or ecx,esi
let instr = decoder.decode();
assert!(!instr.is_stack_instruction());

// push rax
let instr = decoder.decode();
assert!(instr.is_stack_instruction());
assert_eq!(instr.stack_pointer_increment(), -8);

true if it’s an instruction that saves or restores too many registers (eg. FXRSTOR, XSAVE, etc).

true if it’s a “string” instruction, such as MOVS, LODS, SCAS, etc.

All flags that are read by the CPU when executing the instruction. This method returns an RflagsBits value. See also rflags_modified().

Examples
use iced_x86::*;

// adc rsi,rcx
// xor rdi,5Ah
let bytes = b"\x48\x11\xCE\x48\x83\xF7\x5A";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

// adc rsi,rcx
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::CF);
assert_eq!(instr.rflags_written(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::NONE);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::NONE);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

// xor rdi,5Ah
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::NONE);
assert_eq!(instr.rflags_written(), RflagsBits::SF | RflagsBits::ZF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::OF | RflagsBits::CF);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::AF);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

All flags that are written by the CPU, except those flags that are known to be undefined, always set or always cleared. This method returns an RflagsBits value. See also rflags_modified().

Examples
use iced_x86::*;

// adc rsi,rcx
// xor rdi,5Ah
let bytes = b"\x48\x11\xCE\x48\x83\xF7\x5A";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

// adc rsi,rcx
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::CF);
assert_eq!(instr.rflags_written(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::NONE);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::NONE);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

// xor rdi,5Ah
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::NONE);
assert_eq!(instr.rflags_written(), RflagsBits::SF | RflagsBits::ZF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::OF | RflagsBits::CF);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::AF);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

All flags that are always cleared by the CPU. This method returns an RflagsBits value. See also rflags_modified().

Examples
use iced_x86::*;

// adc rsi,rcx
// xor rdi,5Ah
let bytes = b"\x48\x11\xCE\x48\x83\xF7\x5A";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

// adc rsi,rcx
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::CF);
assert_eq!(instr.rflags_written(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::NONE);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::NONE);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

// xor rdi,5Ah
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::NONE);
assert_eq!(instr.rflags_written(), RflagsBits::SF | RflagsBits::ZF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::OF | RflagsBits::CF);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::AF);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

All flags that are always set by the CPU. This method returns an RflagsBits value. See also rflags_modified().

Examples
use iced_x86::*;

// adc rsi,rcx
// xor rdi,5Ah
let bytes = b"\x48\x11\xCE\x48\x83\xF7\x5A";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

// adc rsi,rcx
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::CF);
assert_eq!(instr.rflags_written(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::NONE);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::NONE);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

// xor rdi,5Ah
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::NONE);
assert_eq!(instr.rflags_written(), RflagsBits::SF | RflagsBits::ZF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::OF | RflagsBits::CF);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::AF);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

All flags that are undefined after executing the instruction. This method returns an RflagsBits value. See also rflags_modified().

Examples
use iced_x86::*;

// adc rsi,rcx
// xor rdi,5Ah
let bytes = b"\x48\x11\xCE\x48\x83\xF7\x5A";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

// adc rsi,rcx
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::CF);
assert_eq!(instr.rflags_written(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::NONE);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::NONE);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

// xor rdi,5Ah
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::NONE);
assert_eq!(instr.rflags_written(), RflagsBits::SF | RflagsBits::ZF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::OF | RflagsBits::CF);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::AF);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

All flags that are modified by the CPU. This is rflags_written() + rflags_cleared() + rflags_set() + rflags_undefined(). This method returns an RflagsBits value.

Examples
use iced_x86::*;

// adc rsi,rcx
// xor rdi,5Ah
let bytes = b"\x48\x11\xCE\x48\x83\xF7\x5A";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

// adc rsi,rcx
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::CF);
assert_eq!(instr.rflags_written(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::NONE);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::NONE);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

// xor rdi,5Ah
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::NONE);
assert_eq!(instr.rflags_written(), RflagsBits::SF | RflagsBits::ZF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::OF | RflagsBits::CF);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::AF);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

Checks if it’s a Jcc SHORT or Jcc NEAR instruction

Checks if it’s a Jcc NEAR instruction

Checks if it’s a Jcc SHORT instruction

Checks if it’s a JMP SHORT instruction

Checks if it’s a JMP NEAR instruction

Checks if it’s a JMP SHORT or a JMP NEAR instruction

Checks if it’s a JMP FAR instruction

Checks if it’s a CALL NEAR instruction

Checks if it’s a CALL FAR instruction

Checks if it’s a JMP NEAR reg/[mem] instruction

Checks if it’s a JMP FAR [mem] instruction

Checks if it’s a CALL NEAR reg/[mem] instruction

Checks if it’s a CALL FAR [mem] instruction

Checks if it’s a JKccD SHORT or JKccD NEAR instruction

Checks if it’s a JKccD NEAR instruction

Checks if it’s a JKccD SHORT instruction

Checks if it’s a JCXZ SHORT, JECXZ SHORT or JRCXZ SHORT instruction

Checks if it’s a LOOPcc SHORT instruction

Checks if it’s a LOOP SHORT instruction

Negates the condition code, eg. JE -> JNE. Can be used if it’s Jcc, SETcc, CMOVcc, LOOPcc and does nothing if the instruction doesn’t have a condition code.

Examples
use iced_x86::*;

// setbe al
let bytes = b"\x0F\x96\xC0";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

let mut instr = decoder.decode();
assert_eq!(instr.code(), Code::Setbe_rm8);
assert_eq!(instr.condition_code(), ConditionCode::be);
instr.negate_condition_code();
assert_eq!(instr.code(), Code::Seta_rm8);
assert_eq!(instr.condition_code(), ConditionCode::a);

Converts Jcc/JMP NEAR to Jcc/JMP SHORT and does nothing if it’s not a Jcc/JMP NEAR instruction

Examples
use iced_x86::*;

// jbe near ptr label
let bytes = b"\x0F\x86\x5A\xA5\x12\x34";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

let mut instr = decoder.decode();
assert_eq!(instr.code(), Code::Jbe_rel32_64);
instr.as_short_branch();
assert_eq!(instr.code(), Code::Jbe_rel8_64);
instr.as_short_branch();
assert_eq!(instr.code(), Code::Jbe_rel8_64);

Converts Jcc/JMP SHORT to Jcc/JMP NEAR and does nothing if it’s not a Jcc/JMP SHORT instruction

Examples
use iced_x86::*;

// jbe short label
let bytes = b"\x76\x5A";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

let mut instr = decoder.decode();
assert_eq!(instr.code(), Code::Jbe_rel8_64);
instr.as_near_branch();
assert_eq!(instr.code(), Code::Jbe_rel32_64);
instr.as_near_branch();
assert_eq!(instr.code(), Code::Jbe_rel32_64);

Gets the condition code if it’s Jcc, SETcc, CMOVcc, LOOPcc else ConditionCode::None is returned

Examples
use iced_x86::*;

// setbe al
// jl short label
// cmovne ecx,esi
// nop
let bytes = b"\x0F\x96\xC0\x7C\x5A\x0F\x45\xCE\x90";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

// setbe al
let instr = decoder.decode();
assert_eq!(instr.condition_code(), ConditionCode::be);

// jl short label
let instr = decoder.decode();
assert_eq!(instr.condition_code(), ConditionCode::l);

// cmovne ecx,esi
let instr = decoder.decode();
assert_eq!(instr.condition_code(), ConditionCode::ne);

// nop
let instr = decoder.decode();
assert_eq!(instr.condition_code(), ConditionCode::None);

Gets the OpCodeInfo

Creates an instruction with no operands

Arguments
  • code: Code value

Creates an instruction with 1 operand

Errors

Fails if one of the operands is invalid (basic checks)

Arguments
  • code: Code value
  • op0: First operand (eg. a Register, an integer (a u32/i64/u64 number suffix is sometimes needed), or a MemoryOperand)
Examples
use iced_x86::*;

let _ = Instruction::with1(Code::Pop_rm64, Register::RCX)?;
let _ = Instruction::with1(Code::Pop_rm64, MemoryOperand::new(Register::RBP, Register::RSI, 2, -0x5432_10FF, 8, false, Register::FS))?;

Creates an instruction with 2 operands

Errors

Fails if one of the operands is invalid (basic checks)

Arguments
  • code: Code value
  • op0: First operand (eg. a Register, an integer (a u32/i64/u64 number suffix is sometimes needed), or a MemoryOperand)
  • op1: Second operand
Examples
use iced_x86::*;

let _ = Instruction::with2(Code::Add_rm8_r8, Register::CL, Register::DL)?;
let _ = Instruction::with2(Code::Add_r8_rm8, Register::CL, MemoryOperand::new(Register::RBP, Register::RSI, 2, -0x5432_10FF, 8, false, Register::FS))?;

Creates an instruction with 3 operands

Errors

Fails if one of the operands is invalid (basic checks)

Arguments
  • code: Code value
  • op0: First operand (eg. a Register, an integer (a u32/i64/u64 number suffix is sometimes needed), or a MemoryOperand)
  • op1: Second operand
  • op2: Third operand
Examples
use iced_x86::*;

let _ = Instruction::with3(Code::Imul_r16_rm16_imm16, Register::CX, Register::DX, 0x5AA5)?;
let _ = Instruction::with3(Code::Imul_r16_rm16_imm16, Register::CX, MemoryOperand::new(Register::RBP, Register::RSI, 2, -0x5432_10FF, 8, false, Register::FS), 0xA55A)?;

Creates an instruction with 4 operands

Errors

Fails if one of the operands is invalid (basic checks)

Arguments
  • code: Code value
  • op0: First operand (eg. a Register, an integer (a u32/i64/u64 number suffix is sometimes needed), or a MemoryOperand)
  • op1: Second operand
  • op2: Third operand
  • op3: Fourth operand
Examples
use iced_x86::*;

let _ = Instruction::with4(Code::Insertq_xmm_xmm_imm8_imm8, Register::XMM1, Register::XMM2, 0xA5, 0xFD)?;
let _ = Instruction::with4(Code::VEX_Vfmaddsubps_xmm_xmm_xmm_xmmm128, Register::XMM1, Register::XMM2, Register::XMM3, MemoryOperand::new(Register::RBP, Register::RSI, 2, -0x5432_10FF, 8, false, Register::FS))?;

Creates an instruction with 5 operands

Errors

Fails if one of the operands is invalid (basic checks)

Arguments
  • code: Code value
  • op0: First operand (eg. a Register, an integer (a u32/i64/u64 number suffix is sometimes needed), or a MemoryOperand)
  • op1: Second operand
  • op2: Third operand
  • op3: Fourth operand
  • op4: Fifth operand
Examples
use iced_x86::*;

let _ = Instruction::with5(Code::VEX_Vpermil2ps_xmm_xmm_xmmm128_xmm_imm4, Register::XMM1, Register::XMM2, Register::XMM3, Register::XMM4, 0x0)?;
let _ = Instruction::with5(Code::VEX_Vpermil2ps_xmm_xmm_xmm_xmmm128_imm4, Register::XMM1, Register::XMM2, Register::XMM3, MemoryOperand::new(Register::RBP, Register::RSI, 2, -0x5432_10FF, 8, false, Register::FS), 0x1)?;

Creates a new near/short branch instruction

Errors

Fails if the created instruction doesn’t have a near branch operand

Arguments
  • code: Code value
  • target: Target address

Creates a new far branch instruction

Errors

Fails if the created instruction doesn’t have a far branch operand

Arguments
  • code: Code value
  • selector: Selector/segment value
  • offset: Offset

Creates a new XBEGIN instruction

Errors

Fails if bitness is not one of 16, 32, 64.

Arguments
  • bitness: 16, 32, or 64
  • target: Target address

Creates a OUTSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REP OUTSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a OUTSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REP OUTSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a OUTSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REP OUTSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a LODSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REP LODSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a LODSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REP LODSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a LODSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REP LODSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a LODSQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REP LODSQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a SCASB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REPE SCASB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a REPNE SCASB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a SCASW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REPE SCASW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a REPNE SCASW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a SCASD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REPE SCASD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a REPNE SCASD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a SCASQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REPE SCASQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a REPNE SCASQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a INSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REP INSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a INSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REP INSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a INSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REP INSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a STOSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REP STOSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a STOSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REP STOSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a STOSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REP STOSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a STOSQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REP STOSQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a CMPSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REPE CMPSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a REPNE CMPSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a CMPSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REPE CMPSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a REPNE CMPSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a CMPSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REPE CMPSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a REPNE CMPSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a CMPSQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REPE CMPSQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a REPNE CMPSQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a MOVSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REP MOVSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a MOVSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REP MOVSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a MOVSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REP MOVSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a MOVSQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

Creates a REP MOVSQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64

Creates a MASKMOVQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64
  • register1: Register
  • register2: Register
  • segment_prefix: Segment override or Register::None

Creates a MASKMOVDQU instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64
  • register1: Register
  • register2: Register
  • segment_prefix: Segment override or Register::None

Creates a VMASKMOVDQU instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments
  • address_size: 16, 32, or 64
  • register1: Register
  • register2: Register
  • segment_prefix: Segment override or Register::None

Creates a db/.byte asm directive

Arguments
  • b0: Byte 0

Creates a db/.byte asm directive

Arguments
  • b0: Byte 0
  • b1: Byte 1

Creates a db/.byte asm directive

Arguments
  • b0: Byte 0
  • b1: Byte 1
  • b2: Byte 2

Creates a db/.byte asm directive

Arguments
  • b0: Byte 0
  • b1: Byte 1
  • b2: Byte 2
  • b3: Byte 3

Creates a db/.byte asm directive

Arguments
  • b0: Byte 0
  • b1: Byte 1
  • b2: Byte 2
  • b3: Byte 3
  • b4: Byte 4

Creates a db/.byte asm directive

Arguments
  • b0: Byte 0
  • b1: Byte 1
  • b2: Byte 2
  • b3: Byte 3
  • b4: Byte 4
  • b5: Byte 5

Creates a db/.byte asm directive

Arguments
  • b0: Byte 0
  • b1: Byte 1
  • b2: Byte 2
  • b3: Byte 3
  • b4: Byte 4
  • b5: Byte 5
  • b6: Byte 6

Creates a db/.byte asm directive

Arguments
  • b0: Byte 0
  • b1: Byte 1
  • b2: Byte 2
  • b3: Byte 3
  • b4: Byte 4
  • b5: Byte 5
  • b6: Byte 6
  • b7: Byte 7

Creates a db/.byte asm directive

Arguments
  • b0: Byte 0
  • b1: Byte 1
  • b2: Byte 2
  • b3: Byte 3
  • b4: Byte 4
  • b5: Byte 5
  • b6: Byte 6
  • b7: Byte 7
  • b8: Byte 8

Creates a db/.byte asm directive

Arguments
  • b0: Byte 0
  • b1: Byte 1
  • b2: Byte 2
  • b3: Byte 3
  • b4: Byte 4
  • b5: Byte 5
  • b6: Byte 6
  • b7: Byte 7
  • b8: Byte 8
  • b9: Byte 9

Creates a db/.byte asm directive

Arguments
  • b0: Byte 0
  • b1: Byte 1
  • b2: Byte 2
  • b3: Byte 3
  • b4: Byte 4
  • b5: Byte 5
  • b6: Byte 6
  • b7: Byte 7
  • b8: Byte 8
  • b9: Byte 9
  • b10: Byte 10

Creates a db/.byte asm directive

Arguments
  • b0: Byte 0
  • b1: Byte 1
  • b2: Byte 2
  • b3: Byte 3
  • b4: Byte 4
  • b5: Byte 5
  • b6: Byte 6
  • b7: Byte 7
  • b8: Byte 8
  • b9: Byte 9
  • b10: Byte 10
  • b11: Byte 11

Creates a db/.byte asm directive

Arguments
  • b0: Byte 0
  • b1: Byte 1
  • b2: Byte 2
  • b3: Byte 3
  • b4: Byte 4
  • b5: Byte 5
  • b6: Byte 6
  • b7: Byte 7
  • b8: Byte 8
  • b9: Byte 9
  • b10: Byte 10
  • b11: Byte 11
  • b12: Byte 12

Creates a db/.byte asm directive

Arguments
  • b0: Byte 0
  • b1: Byte 1
  • b2: Byte 2
  • b3: Byte 3
  • b4: Byte 4
  • b5: Byte 5
  • b6: Byte 6
  • b7: Byte 7
  • b8: Byte 8
  • b9: Byte 9
  • b10: Byte 10
  • b11: Byte 11
  • b12: Byte 12
  • b13: Byte 13

Creates a db/.byte asm directive

Arguments
  • b0: Byte 0
  • b1: Byte 1
  • b2: Byte 2
  • b3: Byte 3
  • b4: Byte 4
  • b5: Byte 5
  • b6: Byte 6
  • b7: Byte 7
  • b8: Byte 8
  • b9: Byte 9
  • b10: Byte 10
  • b11: Byte 11
  • b12: Byte 12
  • b13: Byte 13
  • b14: Byte 14

Creates a db/.byte asm directive

Arguments
  • b0: Byte 0
  • b1: Byte 1
  • b2: Byte 2
  • b3: Byte 3
  • b4: Byte 4
  • b5: Byte 5
  • b6: Byte 6
  • b7: Byte 7
  • b8: Byte 8
  • b9: Byte 9
  • b10: Byte 10
  • b11: Byte 11
  • b12: Byte 12
  • b13: Byte 13
  • b14: Byte 14
  • b15: Byte 15

Creates a db/.byte asm directive

Errors

Fails if data.len() is not 1-16

Arguments
  • data: Data

Creates a dw/.word asm directive

Arguments
  • w0: Word 0

Creates a dw/.word asm directive

Arguments
  • w0: Word 0
  • w1: Word 1

Creates a dw/.word asm directive

Arguments
  • w0: Word 0
  • w1: Word 1
  • w2: Word 2

Creates a dw/.word asm directive

Arguments
  • w0: Word 0
  • w1: Word 1
  • w2: Word 2
  • w3: Word 3

Creates a dw/.word asm directive

Arguments
  • w0: Word 0
  • w1: Word 1
  • w2: Word 2
  • w3: Word 3
  • w4: Word 4

Creates a dw/.word asm directive

Arguments
  • w0: Word 0
  • w1: Word 1
  • w2: Word 2
  • w3: Word 3
  • w4: Word 4
  • w5: Word 5

Creates a dw/.word asm directive

Arguments
  • w0: Word 0
  • w1: Word 1
  • w2: Word 2
  • w3: Word 3
  • w4: Word 4
  • w5: Word 5
  • w6: Word 6

Creates a dw/.word asm directive

Arguments
  • w0: Word 0
  • w1: Word 1
  • w2: Word 2
  • w3: Word 3
  • w4: Word 4
  • w5: Word 5
  • w6: Word 6
  • w7: Word 7

Creates a dw/.word asm directive

Errors

Fails if data.len() is not 2-16 or not a multiple of 2

Arguments
  • data: Data

Creates a dw/.word asm directive

Errors

Fails if data.len() is not 1-8

Arguments
  • data: Data

Creates a dd/.int asm directive

Arguments
  • d0: Dword 0

Creates a dd/.int asm directive

Arguments
  • d0: Dword 0
  • d1: Dword 1

Creates a dd/.int asm directive

Arguments
  • d0: Dword 0
  • d1: Dword 1
  • d2: Dword 2

Creates a dd/.int asm directive

Arguments
  • d0: Dword 0
  • d1: Dword 1
  • d2: Dword 2
  • d3: Dword 3

Creates a dd/.int asm directive

Errors

Fails if data.len() is not 4-16 or not a multiple of 4

Arguments
  • data: Data

Creates a dd/.int asm directive

Errors

Fails if data.len() is not 1-4

Arguments
  • data: Data

Creates a dq/.quad asm directive

Arguments
  • q0: Qword 0

Creates a dq/.quad asm directive

Arguments
  • q0: Qword 0
  • q1: Qword 1

Creates a dq/.quad asm directive

Errors

Fails if data.len() is not 8-16 or not a multiple of 8

Arguments
  • data: Data

Creates a dq/.quad asm directive

Errors

Fails if data.len() is not 1-2

Arguments
  • data: Data

Trait Implementations

Returns a copy of the value. Read more
Performs copy-assignment from source. Read more
Formats the value using the given formatter. Read more
Returns the “default value” for a type. Read more
Deserialize this value from the given Serde deserializer. Read more
Formats the value using the given formatter. Read more
Feeds this value into the given Hasher. Read more
Feeds a slice of this type into the given Hasher. Read more
This method tests for self and other values to be equal, and is used by ==. Read more
This method tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason. Read more
Serialize this value into the given Serde serializer. Read more

Auto Trait Implementations

Blanket Implementations

Gets the TypeId of self. Read more
Immutably borrows from an owned value. Read more
Mutably borrows from an owned value. Read more

Returns the argument unchanged.

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

The resulting type after obtaining ownership.
Creates owned data from borrowed data, usually by cloning. Read more
Uses borrowed data to replace owned data, usually by cloning. Read more
Converts the given value to a String. Read more
The type returned in the event of a conversion error.
Performs the conversion.
The type returned in the event of a conversion error.
Performs the conversion.