This is supported on
target_arch="riscv32"
only.Expand description
Stores virtual machine memory by word integer
This instruction performs an explicit memory access as though V=1
;
i.e., with the address translation and protection, and the endianness, that apply to memory
accesses in either VS-mode or VU-mode.
This function is unsafe for it accesses the virtual supervisor or user via a HSV.W
instruction which is effectively an unreference to any memory address.