🔬This is a nightly-only experimental API. (
stdsimd
#48556)Available on RISC-V RV64 and (RISC-V RV32 or RISC-V RV64) only.
Expand description
Accesses virtual machine instruction by unsigned word integer
This instruction performs an explicit memory access as though V=1
;
the memory being read must be executable in both stages of address translation,
but read permission is not required.
This function is unsafe for it accesses the virtual supervisor or user via a HLVX.WU
instruction which is effectively a dereference to any memory address.